Assumptions, hidden variables and circuit families
Bring ideas together without being told which method to use. Show the reasoning that makes your result valid.
Suggested session length: 100 minutes, as an unvalidated planning estimate. This collection contains 4 tasks; choose a manageable set and return for further sessions. Completing the whole collection may take substantially longer. This is a unit assessment, not a full course or AP examination.
Attempt the changed specifications before revealing solutions. State the input domain and any assumptions beside every equivalence claim.
A finite truth table can exhaust a fixed finite domain; a circuit family needs a general argument.
Public solutions and rubrics support human review; recording a response does not certify independent proficiency.
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Let H=(A XOR B)∧C. Assume C is independent of the pair(A,B), with P(A)=1/3,P(B)=1/2,P(C)=3/4. Let t=P(A∧B). Construct the four A/B pair weights, derive the feasible interval for t and the resulting exact range of P(H). Find the mutually independent value. Finally refute the claim that two formulas with equal probability under a fixed distribution must be logically equivalent.
Structure your argument and preserve revisions
These optional planning fields save locally. Recording your response saves an immutable copy of the argument and these fields. Older records may contain only first/latest responses; missing intermediate revisions are not reconstructed.
Each field allows 2,000 characters. Keep a specific claim, state where it applies, cite the facts you use, and explain what still needs checking. Blank fields are allowed and are not evidence of mastery.
Let F=A∨B∨C and G=(A XOR B)∨C, where XOR is true exactly when its two inputs differ. A designer claims F and G are interchangeable because A and B are never both true. Prove equivalence under that assumption, find every assignment where unrestricted equivalence fails, and derive the weakest Boolean condition H under which they agree: H must be true exactly on agreeing assignments. Give both a simplified formula and a truth-table construction for H. Explain why checking one successful assignment or merely finding that both formulas are satisfiable is insufficient.
Structure your argument and preserve revisions
These optional planning fields save locally. Recording your response saves an immutable copy of the argument and these fields. Older records may contain only first/latest responses; missing intermediate revisions are not reconstructed.
Each field allows 2,000 characters. Keep a specific claim, state where it applies, cite the facts you use, and explain what still needs checking. Blank fields are allowed and are not evidence of mastery.
Let A,B be visible bits and Z an auxiliary bit. Define K(A,B,Z)=(Z↔(A XOR B))∧Z. For each visible assignment determine whether there exists a Z satisfying K and whether that Z is unique. Prove the resulting visible condition, express it in DNF and CNF, and distinguish existential projection from claiming K is equivalent to A XOR B on all three inputs. Supply a counterexample to that latter claim. Does replacing the equivalence inside K by only Z→(A XOR B) change the visible projection here? Explain why the final conjunct Z matters.
Structure your argument and preserve revisions
These optional planning fields save locally. Recording your response saves an immutable copy of the argument and these fields. Older records may contain only first/latest responses; missing intermediate revisions are not reconstructed.
Each field allows 2,000 characters. Keep a specific claim, state where it applies, cite the facts you use, and explain what still needs checking. Blank fields are allowed and are not evidence of mastery.
Assume a two-input XOR gate is one unit of work and one unit of delay, wires and input constants cost zero, and arbitrarily many gates may operate in parallel. For n≥1 input bits construct a balanced circuit whose output is one exactly when an odd number of inputs are one. Prove correctness for arbitrary n, count gates and derive its depth using a recursive split into floor(n/2) and ceil(n/2) inputs. Prove no circuit of fan-in at most two and depth d can have an output depending on more than 2^d distinct input bits, and use this to certify depth optimality. Explain why the gate convention and parallelism assumptions matter.
Structure your argument and preserve revisions
These optional planning fields save locally. Recording your response saves an immutable copy of the argument and these fields. Older records may contain only first/latest responses; missing intermediate revisions are not reconstructed.
Each field allows 2,000 characters. Keep a specific claim, state where it applies, cite the facts you use, and explain what still needs checking. Blank fields are allowed and are not evidence of mastery.
Review and revisit
Use each rubric to identify a valid argument, a missing condition or a step to revise. For independent evaluation, ask a teacher or reviewer to examine the complete reasoning. Self-review and recorded responses are not verified assessment results.
Coverage and targeted lesson returns
Let H=(A XOR B)∧C. Assume C is independent of the pair(A,B), with P(A)=1/3,P(B)=1/2,P(C)=3/4. Let t=P(A∧B). Construct the four A/B pair weights, derive the feasible interval for t and the resulting exact range of P(H). Find the mutually independent value. Finally refute the claim that two formulas with equal probability under a fixed distribution must be logically equivalent.
Let F=A∨B∨C and G=(A XOR B)∨C, where XOR is true exactly when its two inputs differ. A designer claims F and G are interchangeable because A and B are never both true. Prove equivalence under that assumption, find every assignment where unrestricted equivalence fails, and derive the weakest Boolean condition H under which they agree: H must be true exactly on agreeing assignments. Give both a simplified formula and a truth-table construction for H. Explain why checking one successful assignment or merely finding that both formulas are satisfiable is insufficient.
Let A,B be visible bits and Z an auxiliary bit. Define K(A,B,Z)=(Z↔(A XOR B))∧Z. For each visible assignment determine whether there exists a Z satisfying K and whether that Z is unique. Prove the resulting visible condition, express it in DNF and CNF, and distinguish existential projection from claiming K is equivalent to A XOR B on all three inputs. Supply a counterexample to that latter claim. Does replacing the equivalence inside K by only Z→(A XOR B) change the visible projection here? Explain why the final conjunct Z matters.
Assume a two-input XOR gate is one unit of work and one unit of delay, wires and input constants cost zero, and arbitrarily many gates may operate in parallel. For n≥1 input bits construct a balanced circuit whose output is one exactly when an odd number of inputs are one. Prove correctness for arbitrary n, count gates and derive its depth using a recursive split into floor(n/2) and ceil(n/2) inputs. Prove no circuit of fan-in at most two and depth d can have an output depending on more than 2^d distinct input bits, and use this to certify depth optimality. Explain why the gate convention and parallelism assumptions matter.
